On 18 May, 16:56, nos...@[EMAIL PROTECTED]
(Niels J=F8rgen Kruse) wrote:
> James Harris <james.harri...@[EMAIL PROTECTED]
> wrote:
=2E..
> > How on earth can register selection slow down? I'm not sure what the
> > book is you are referring to. Is it recent?
>
> A register number is a binary number, a pattern of signals on a small
> number of wires. To select a register you have to send a signal down one
> particular wire out of as many as you have registers. This get more
> complex the more registers you have.
I would have thought they were selected in parallel. Even if we had
512 registers they would need only 9 address bits. Each register
would, in theory, need nine ands and ors - 'and' all the ones 'and'
'nor' all the zeros, for example, though I suspect some factorisation
could be done. If an ALU can carry out some of its fairly complex
operations in one cycle I would think the extra delays of another one
or two levels of and/or address selection would be easily absorbable.
I haven't seen any figures but the ALU operations would need a number
of these for some functions.
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